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Marvell Technology, Inc.

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X4A MarketWire @marketwire

Marvell, Microsoft and Oracle Establish OCP Working Group to Standardize Data Center Hardware Security

New Open Compute Project (OCP) working group: Companies form a new working group to standardize on a silicon-based and attested secure integrated hardware security module (HSM) solution for cloud and hyperscale data center infrastructure.

Strengthening cloud security: Secure key caching and attestation cryptographic key lifecycle management at the server level will reduce latency, improve scalability and strengthen the security posture of cloud compute workloads.

Open technical specification: Initial draft of technical specification to be released at OCP Global Summit in October 2026, paving the way for broad industry adoption of in-server security for data centers. | $MRVL $MSFT $ORCL

X4A MarketWire @marketwire

Marvell Bolsters Connectivity Portfolio with New 3.2T Protocol-aware Retimer and Second-generation 1.6T AEC DSP

Scaling connectivity to 3.2T: Marvell® Alaska® E 3.2T protocol-aware Ethernet, UALink™ and ESUN retimer delivers 16 lanes of 224G PAM4 connectivity for high-bandwidth XPU-to-XPU and XPU-to-switch scale-up architectures.

Advancing 200G/lane AECs: Second-generation Alaska A 1.6T AEC DSP moves to the 3nm node, delivering higher performance and improved power efficiency for 1.6T active electrical cables used across AI racks.

Built for next-generation AI infrastructure: Designed to meet the increasing bandwidth, reach and power-efficiency demands of advanced AI scale-up infrastructure at 224G/lane.

Availability: Alaska E 3.2T protocol-aware retimer and second-generation Alaska A 1.6T are now sampling to customers. | $MRVL

X4A MarketWire @marketwire

Marvell Unveils Second-generation Structera X, Industry-first Six-channel CXL 3.2 Memory Expanders for AI Inference

Expanding memory capacity for AI: Second-generation Marvell® Structera™ X 3406 and 3506 CXL 3.2 memory expanders add six DDR4/DDR5 channels (50% more than the prior generation) and PCIe Gen 6 connectivity, supporting up to 9TB of DDR4 or 6TB of DDR5 per controller.

Addresses growing memory demand: Multi-host sharing and inline LZ4 compression deliver up to 2–3x more effective capacity, with up to 40–50% faster time to first token at equivalent context length.

Preview and availability: Demoing at the OCP Summit, the Structera X 3406 and 3506 are expected to sample in Q1 2027, extending the Structera X 2404 and 2504 architecture already shipping to hyperscalers. | $MRVL

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